QuickLogic Corporation has released a new version of its eFPGA Aurora development toolset. The Aurora 2.1 development tool suite is based on fully open source code for scalability, durability and full code transparency. It supports all major HDLs, including Verilog, System Verilog, and VHDL.

“QuickLogic remains committed to open source, and our new Aurora 2.1 Development Tool Suite underscores that mission. Now, SoC developers can combine the advantages of open-source tools with the dramatic flexibility benefits of embedding FPGA technology into their devices to improve device lifecycles and enhance profitability.”

said Mao Wang, senior director of product development at QuickLogic Corporation.

The new version is based on open source synthesis software (Yosys), flexible placement and routing (VPR), and bitstream generation (OpenFPGA). The integrated suite of tools allows FPGA designers to switch from RTL to bitstream for QuickLogic’s eFPGA IP.

The Aurora eFPGA user tools also support an architecture analysis mode that will allow users to tune the architecture for their application.

Aurora uses readily available open-source components that the broader community is actively improving upon and the user has ultimate control of the future. The code is highly inspectable, enabling continuous improvement by the development community.

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